Subtractor
The same we designed adder circuitry, we can design the digital circuit that performs subtraction of two binary-digits, termed as subtractor. The subtractor that subtracts two bits is a half subtractor while the one which subtracts two-bits along with borrow (like carry in adder), is a full subtractor.
The truth table for a half subtractor is :
The truth table for a half subtractor is :
And equations for D and C are:
D = A’B + AB’ = A EX-OR B C = A’B
Implementation of half-subtractor:
D = A’B + AB’ = A EX-OR B C = A’B
Implementation of half-subtractor:
Next, the truth table for full subtractor,
Where,
D = A EX-OR B EX-OR Cin Cout = A’B + Cin (A’ + B}
This is same as full adder except that for borrow (Cout), A is complemented. Same is true for Half-subtractor. This implies that somehow, addition and subtraction are relevant and by some technique, we should be able to use a common hardware for both these arithmetic operations, because we do not perform both operations simultaneously in any practical system.
Go through the number systems and find out what 2’s complement, 1’s complement numbers are, for the binary number system.
The fact is that, subtraction of two numbers (say A-B), is same as addition of A and the 2’s complement of B. So, here we go or a common hardware for addition and subtraction. Now extra logic to be added is finding two’s complement of a number and feed it to the adder.
2’s complement of a number = 1’s complement of the number + 1
Further, 1’s complement of any binary number is negation of whole number, bit-by-bit.
e.g. 1’s complement of (110001)b = (001110)b
and then add 1 to it to get 2’s complement.
D = A EX-OR B EX-OR Cin Cout = A’B + Cin (A’ + B}
This is same as full adder except that for borrow (Cout), A is complemented. Same is true for Half-subtractor. This implies that somehow, addition and subtraction are relevant and by some technique, we should be able to use a common hardware for both these arithmetic operations, because we do not perform both operations simultaneously in any practical system.
Go through the number systems and find out what 2’s complement, 1’s complement numbers are, for the binary number system.
The fact is that, subtraction of two numbers (say A-B), is same as addition of A and the 2’s complement of B. So, here we go or a common hardware for addition and subtraction. Now extra logic to be added is finding two’s complement of a number and feed it to the adder.
2’s complement of a number = 1’s complement of the number + 1
Further, 1’s complement of any binary number is negation of whole number, bit-by-bit.
e.g. 1’s complement of (110001)b = (001110)b
and then add 1 to it to get 2’s complement.
the logic shown above gives the 1’s complement of a bit b, whenever S=1. We want this because a number is to be in 2’s complement form only for subtraction while for addition, it is to be as it is. So, S is our control signal defined as
S = 0 for addition
S = 1 for subtraction
Now that we got 1’s complement, we need to add 1 to it to get 2’s complement. So, we can use same S which is 1 for subtraction and provide it as carry-in input of the adder.
It must be noted that result of subtraction is in 2’s complement form.
Finally, we get the same piece of hardware that performs both addition and subtraction (either at a time) based on control signal S.
S = 0 for addition
S = 1 for subtraction
Now that we got 1’s complement, we need to add 1 to it to get 2’s complement. So, we can use same S which is 1 for subtraction and provide it as carry-in input of the adder.
It must be noted that result of subtraction is in 2’s complement form.
Finally, we get the same piece of hardware that performs both addition and subtraction (either at a time) based on control signal S.